Computer Function and Interconnection Chapter 3 | Computer Organization and Architecture عربى

مادة تنظيم و عمارة الحاسب الالى , William Stallings Computer Organization and Architecture
1 Fundamentals of Digital Logic Boolean Algebra, Logic Gates, Simplification of Logic Circuits: Algebraic Simplification, Karnaugh Maps. Combinational Circuits : Adders, Mux, De-Mux, Sequential Circuits : Flip-Flops (SR, JK & D), Counters : synchronous and asynchronous Counter

2 Computer System Comparison of Computer Organization &Architecture, Computer Components and Functions, Interconnection Structures. Bus Interconnections, Input / Output: I/O Module, Programmed I/O, Interrupt Driven I/O, Direct Memory Access

3 Memory System Organization Classification and design parameters, Memory Hierarchy, Internal Memory: RAM, SRAM and DRAM, Interleaved and Associative Memory. Cache Memory: Design Principles, Memory mappings, Replacement Algorithms, Cache performance, Cache Coherence. Virtual Memory, External Memory : Magnetic Discs, Optical Memory, Flash Memories, RAID Levels

4 Processor Organization Instruction Formats, Instruction Sets, Addressing Modes, Addressing Modes Examples with Assembly Language [8085/8086 CPU] , Processor Organization, Structure and Function. Register Organization, Instruction Cycle, Instruction Pipelining. Introduction to RISC and CISC Architecture, Instruction Level Parallelism and Superscalar Processors: Design Issues. 12 v Sr. No. Module Detailed

5 Control Unit Micro-Operations, Functional Requirements, Processor Control, Hardwired Implementation, Micro-programmed Control

6 Fundamentals of Advanced Computer Architecture Parallel Architecture: Classification of Parallel Systems, Flynn’s Taxonomy, Array Processors, Clusters, and NUMA Computers. Multiprocessor Systems : Structure & Interconnection Networks, Multi-Core Computers: Introduction, Organization and Performance.
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Course Objectives:

CO1: Conceptualize the basics of organizational and architectural issues of a digital computer and Classify and compute the performance of machines, Machine Instructions.

CO2: Learn about various data transfer techniques in digital computer and the I/O interfaces.

CO3: Estimate the performance of various classes of Memories, build large memories using small memories for better performance and Relate to arithmetic for ALU implementation.

CO4: Understand the basics of hardwired and micro-programmed control of the CPU, pipeline and architectures , Hazards and Superscalar Operations.



COURSE OUTCOMES:

1. Understand the theory and architecture of central processing unit.

2. Analyze some of the design issues in terms of speed, technology, cost, performance.

3. Design a simple CPU with applying the theory concepts.

4. Use appropriate tools to design verify and test the CPU architecture.

5. Learn the concepts of parallel processing, pipelining and interprocessor communication.

6. Understand the architecture and functionality of central processing unit.

7. Exemplify in a better way the I/O and memory organization.

8. Define different number systems, binary addition and subtraction, 2’s complement representation and operations with this representation.