Two input OR gate transistor level implementation using Custom Compiler in Synopsys

This videos contains the detail steps to simulate a circuit in Custom compiler:
1. Creating the libraries for the design
2. Creating cell for schematic and creating Cell view as schematic editor
3. Adding instances of 4 terminal NMOS (L=30nm) and 4 terminal PMOS (L=30nm) from library for creating schematic of Two input OR gate transistor level implementation in Custom compiler
4. Adding wires, completing the connection in the schematic
5. Assigning input, output and power pins in the schematic
6. Saving and checking the schematic design for any errors
7. Creating OR2 gate symbol for the schematic from cellview
8. Creating a testbench and creating Cell view as schematic editor
9. In testbench, add symbol created and add vdd, vpulse, gnd instances from defined library to complete the circuit
10. Saving and checking the testbench schematic design for any errors
11. Simulation of Testbench using PrimeSim from tools
12. Add Model files (saed32nm.lib) and add expression (inputs, outputs from design) to be plotted
13. Next, click on analyses and transient analysis defining time step and stop time and save the Testbench
14. Next, click on simulation and click on netlist and run
15. You shall now, see the simulation in a new window
16. One can ungroup them(waveforms) to view individual inputs and outputs
17. Check the functionality of two input OR gate
18. Now your design is complete
Credits: Cloud Based Analog IC Design Hackathon
https://www.iith.ac.in/events/2022/02/15/Cloud-Based-Analog-IC-Design-Hackathon/
https://hackathoniith.in/